Invention Grant
- Patent Title: Vertical silicon/silicon-germanium transistors with multiple threshold voltages
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Application No.: US15873215Application Date: 2018-01-17
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Publication No.: US10332799B2Publication Date: 2019-06-25
- Inventor: Zhenxing Bi , Kangguo Cheng , Juntao Li , Peng Xu
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent Vazken Alexanian
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/8234 ; H01L21/02 ; H01L27/088

Abstract:
A method of forming vertical fin field effect transistors, including, forming a silicon-germanium cap layer on a substrate, forming at least four vertical fins and silicon-germanium caps from the silicon-germanium cap layer and the substrate, where at least two of the at least four vertical fins is in a first subset and at least two of the at least four vertical fins is in a second subset, forming a silicon-germanium doping layer on the plurality of vertical fins and silicon-germanium caps, removing the silicon-germanium doping layer from the at least two of the at least four vertical fins in the second subset, and removing the silicon-germanium cap from at least one of the at least two vertical fins in the first subset, and at least one of the at least two vertical fins in the second subset.
Public/Granted literature
- US20180308763A1 VERTICAL SILICON/SILICON-GERMANIUM TRANSISTORS WITH MULTIPLE THRESHOLD VOLTAGES Public/Granted day:2018-10-25
Information query
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