- 专利标题： Semiconductor constructions, methods of forming vertical memory strings, and methods of forming vertically-stacked structures
-
申请号： US16100003申请日： 2018-08-09
-
公开(公告)号： US10340393B2公开(公告)日： 2019-07-02
- 发明人: John D. Hopkins
- 申请人： Micron Technology, Inc.
- 申请人地址： US ID Boise
- 专利权人： Micron Technology, Inc.
- 当前专利权人： Micron Technology, Inc.
- 当前专利权人地址： US ID Boise
- 代理机构： Wells St. John P.S.
- 主分类号： H01L29/788
- IPC分类号： H01L29/788 ; H01L29/66 ; H01L29/792 ; H01L21/336 ; H01L21/28 ; H01L21/02 ; H01L27/11556 ; H01L27/11582 ; H01L29/423 ; H01L29/51
摘要：
Some embodiments include methods of forming vertical memory strings. A trench is formed to extend through a stack of alternating electrically conductive levels and electrically insulative levels. An electrically insulative panel is formed within the trench. Some sections of the panel are removed to form openings. Each opening has a first pair of opposing sides along the stack, and has a second pair of opposing sides along remaining sections of the panel. Cavities are formed to extend into the electrically conductive levels along the first pair of opposing sides of the openings. Charge blocking material and charge-storage material is formed within the cavities. Channel material is formed within the openings and is spaced from the charge-storage material by gate dielectric material. Some embodiments include semiconductor constructions, and some embodiments include methods of forming vertically-stacked structures.
公开/授权文献
信息查询
IPC分类:
