Invention Grant
- Patent Title: Variable stealth laser dicing process
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Application No.: US15701849Application Date: 2017-09-12
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Publication No.: US10347534B2Publication Date: 2019-07-09
- Inventor: Martin Lapke , Hartmut Buenning , Sascha Moeller , Guido Albermann , Michael Zernack , Leo M. Higgins, III
- Applicant: NXP B.V.
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Agent Senaida B. San Miguel
- Main IPC: H01L21/78
- IPC: H01L21/78 ; H01L21/268 ; H01L21/304 ; H01L21/683

Abstract:
Embodiments are provided herein for separating integrated circuit (IC) device die of a wafer, the wafer having a front side with an active device region and a back side, the active device region having a plurality of active devices arranged in rows and columns and separated by cutting lanes, the method including: attaching the front side of the wafer onto a first dicing tape; forming a modification zone within each cutting lane through the back side of the wafer, wherein each modification zone has a first thickness near a corner of each active device and a second thickness near a center point of each active device, wherein the second thickness is less than the first thickness; and propagating cracks through each cutting lane to separate the plurality of active devices.
Public/Granted literature
- US20190080963A1 VARIABLE STEALTH LASER DICING PROCESS Public/Granted day:2019-03-14
Information query
IPC分类: