公开(公告)号：US08895363B2

公开(公告)日：2014-11-25

申请号：US13833906

申请日：2013-03-15

Applicant: NXP B.V.

Inventor： Hartmut Buenning ,  Sascha Moeller ,  Guido Albermann ,  Thomas Rohleder ,  Michael Zernack

IPC: H01L21/44 ,  H01L21/78 ,  H01L23/544

CPC classification number: H01L21/78 ,  H01L21/6836 ,  H01L23/544 ,  H01L2221/68327 ,  H01L2221/68336 ,  H01L2221/6834 ,  H01L2223/54433 ,  H01L2223/5448 ,  H01L2224/94 ,  H01L2224/11

Abstract: Consistent with an example embodiment, there is a method for assembling a wafer level chip scale processed (WLCSP) device from a wafer substrate, the method comprises grinding the back-side of the wafer substrate to a prescribed thickness. A plurality of trenches is sawed along a plurality of device die boundaries on a back-side surface of the wafer, the trenches having a bevel profile. The plurality of trenches is etched until the bevel profile of the plurality of trenches is rounded.

Abstract translation: 与示例性实施例一致，存在从晶片衬底组装晶片级芯片级处理（WLCSP）器件的方法，该方法包括将晶片衬底的背面磨削至规定厚度。 多个沟槽沿着晶片的背面表面上的多个器件裸片边界锯切，沟槽具有斜面形状。 多个沟槽被蚀刻直到多个沟槽的斜面轮廓为圆形。

公开(公告)号：US10347534B2

公开(公告)日：2019-07-09

申请号：US15701849

申请日：2017-09-12

Applicant: NXP B.V.

Inventor： Martin Lapke ,  Hartmut Buenning ,  Sascha Moeller ,  Guido Albermann ,  Michael Zernack ,  Leo M. Higgins, III

IPC: H01L21/78 ,  H01L21/268 ,  H01L21/304 ,  H01L21/683

Abstract: Embodiments are provided herein for separating integrated circuit (IC) device die of a wafer, the wafer having a front side with an active device region and a back side, the active device region having a plurality of active devices arranged in rows and columns and separated by cutting lanes, the method including: attaching the front side of the wafer onto a first dicing tape; forming a modification zone within each cutting lane through the back side of the wafer, wherein each modification zone has a first thickness near a corner of each active device and a second thickness near a center point of each active device, wherein the second thickness is less than the first thickness; and propagating cracks through each cutting lane to separate the plurality of active devices.

公开(公告)号：US20210305095A1

公开(公告)日：2021-09-30

申请号：US16828115

申请日：2020-03-24

Applicant: NXP B.V.

Inventor： Sascha Moeller ,  Guido Albermann ,  Michael Zernack

IPC: H01L21/78 ,  H01L21/268 ,  H01L21/304 ,  H01L21/3205 ,  H01L21/683 ,  H01L23/544

Abstract: A semiconductor wafer having a plurality of die is attached to a support structure. The semiconductor wafer includes an active layer over a silicon layer, wherein the active layer is at a top side, and a bottom side exposes the silicon layer. While the wafer is attached to the support structure, an infrared laser beam is focused through a portion of the silicon layer to create a modification region along saw lanes located between neighboring die of the plurality of die. Afterwards, a metal layer is formed on the exposed silicon layer at the bottom side of the semiconductor wafer. The metal layer is attached to an expansion tape, and the wafer is singulated by extending the expansion tape to separate the die of the plurality of die along the saw lane. A first singulated die of the plurality of die is packaged to form a packaged semiconductor device.