Invention Grant
- Patent Title: Methods of forming source/drain regions on FinFET devices
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Application No.: US15092168Application Date: 2016-04-06
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Publication No.: US10347748B2Publication Date: 2019-07-09
- Inventor: Shesh Mani Pandey , Muhammad Rahman , Srikanth Balaji Samavedam
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Amerson Law Firm, PLLC
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/265 ; H01L21/306 ; H01L29/08 ; H01L29/78

Abstract:
One illustrative method disclosed herein includes, among other things, forming a fin in a semiconductor substrate, forming a gate structure around the fin and, after forming the gate structure, forming a final source/drain cavity in the fin, wherein the source/drain cavity includes an upper innermost edge and a lower innermost edge, both of which extend laterally under at least a portion of the gate structure, and wherein the lower innermost edge extends laterally further under the gate structure than does the upper innermost edge. The method also includes performing an epitaxial growth process to form an epi semiconductor material in the final source/drain cavity.
Public/Granted literature
- US20170294522A1 METHODS OF FORMING SOURCE/DRAIN REGIONS ON FINFET DEVICES Public/Granted day:2017-10-12
Information query
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