公开(公告)号：US20170294522A1

公开(公告)日：2017-10-12

申请号：US15092168

申请日：2016-04-06

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Shesh Mani Pandey ,  Muhammad Rahman ,  Srikanth Balaji Samavedam

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/08 ,  H01L21/265 ,  H01L21/306

CPC classification number: H01L29/66795 ,  H01L21/265 ,  H01L21/306 ,  H01L29/0847 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851

Abstract: One illustrative method disclosed herein includes, among other things, forming a fin in a semiconductor substrate, forming a gate structure around the fin and, after forming the gate structure, forming a final source/drain cavity in the fin, wherein the source/drain cavity comprises an upper innermost edge and a lower innermost edge, both of which extend laterally under at least a portion of the gate structure, and wherein the lower innermost edge extends laterally further under the gate structure than does the upper innermost edge. The method also includes performing an epitaxial growth process to form an epi semiconductor material in the final source/drain cavity

公开(公告)号：US10347748B2

公开(公告)日：2019-07-09

申请号：US15092168

申请日：2016-04-06

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Shesh Mani Pandey ,  Muhammad Rahman ,  Srikanth Balaji Samavedam

IPC: H01L29/66 ,  H01L21/265 ,  H01L21/306 ,  H01L29/08 ,  H01L29/78

Abstract: One illustrative method disclosed herein includes, among other things, forming a fin in a semiconductor substrate, forming a gate structure around the fin and, after forming the gate structure, forming a final source/drain cavity in the fin, wherein the source/drain cavity includes an upper innermost edge and a lower innermost edge, both of which extend laterally under at least a portion of the gate structure, and wherein the lower innermost edge extends laterally further under the gate structure than does the upper innermost edge. The method also includes performing an epitaxial growth process to form an epi semiconductor material in the final source/drain cavity.