Invention Grant
- Patent Title: Low power high frequency digital pulse frequency modulator
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Application No.: US15641052Application Date: 2017-07-03
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Publication No.: US10354611B2Publication Date: 2019-07-16
- Inventor: Fenardi Thenus , Peng Zou , Raghu Nandan Chepuri , Henry K. Koertzen
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Womble Bond Dickinson (US) LLP
- Main IPC: G09G5/00
- IPC: G09G5/00 ; H02M1/00 ; H03K5/14 ; H03K7/06 ; H03K7/08 ; G06F3/041 ; H02M3/158 ; H03K17/284

Abstract:
An apparatus comprises a programmable delay line (PDL) to receive a pulse-width modulation (PWM) signal as input and to generate a first output; a selection unit to provide PWM signal or its inverted version as a second output; and a sequential unit coupled to the PDL to sample the second output with the first output and to generate a pulse-frequency modulation (PFM) output. A voltage regulator comprises mutually coupled on-die inductors for coupling to a load; a bridge coupled to the mutually coupled on-die inductors, including a low-side switch and a high-side switch; a PWM controller for controlling the low-side and high-side switches during a first load current; and a PFM controller for controlling the low-side and high-side switches during a second load current, the second load current being smaller than the first load current, the PFM controller comprising a comparator and a first PDL coupled to the comparator.
Public/Granted literature
- US20170301309A1 LOW POWER HIGH FREQUENCY DIGITAL PULSE FREQUENCY MODULATOR Public/Granted day:2017-10-19
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