公开(公告)号：US10360055B2

公开(公告)日：2019-07-23

申请号：US14947416

申请日：2015-11-20

Applicant: Intel Corporation

Inventor： Bing Zhu ,  Luhai Chen ,  Peng Zou ,  Kai Wang

IPC: G06F9/455 ,  G06F9/30

Abstract: A method of an aspect includes receiving an indication of an attempt by a virtual machine to modify a paging structure identification storage location to have a given value. It is determined that the given value matches at least one of a set of one or more blacklist values. The attempt by the virtual machine to modify the paging structure identification storage location to have the given value is trapped to a virtual machine monitor. Other methods, apparatus, and systems are also disclosed.

公开(公告)号：US10922114B2

公开(公告)日：2021-02-16

申请号：US15735578

申请日：2016-12-12

Applicant: Intel Corporation

Inventor： Bing Zhu ,  Kai Wang ,  Peng Zou ,  Fangjian Zhong

IPC: G06F9/46 ,  G06F9/455 ,  G06F9/30

Abstract: A processing system includes a first register to store an invalidation mode flag associated with a virtual processor identifier (VPID) and a processing core, communicatively coupled to the first register, the processing core comprising a logic circuit to execute a virtual machine monitor (VMM) environment, the VMM environment comprising a root mode VMM supporting a non-root mode VMM, the non-root mode VMM to execute a virtual machine (VM) identified by the VPID, the logic circuit further comprising an invalidation circuit to execute a virtual processor invalidation (INVVPID) instruction issued by the non-root mode VMM, the INVVPID instruction comprising a reference to an INVVPID descriptor that specifies a linear address and the VPID and responsive to determining that the invalidation mode flag is set, invalidate, without triggering a VM exit event, a memory address mapping associated with the linear address.

公开(公告)号：US20200249983A1

公开(公告)日：2020-08-06

申请号：US16648751

申请日：2017-12-27

Applicant: INTEL CORPORATION

Inventor： Kai Wang ,  Bing Zhu ,  Fangjian Zhong ,  Yadong Qi ,  Peng Zou

IPC: G06F9/48 ,  G06F9/455 ,  G06F9/30 ,  H04L12/40

Abstract: The systems and methods for enabling a lightweight VMM to efficiently interrupt virtual machines are provided. In some examples, the lightweight VMM is configured to utilize a self IPI to deliver external interrupts to the virtual machines. The self IPI may be generated by writing one or more values, including an identifier of the external interrupt, to an ICR of a programmable interrupt controller. The programmable interrupt controller may retrieve the one or more values from the ICR, identify the external interrupt and process the external interrupt, which culminates in the external interrupt being written to an IDT of a virtual machine targeted for interrupt delivery by the lightweight VMM.

公开(公告)号：US09348383B2

公开(公告)日：2016-05-24

申请号：US13783115

申请日：2013-03-01

Applicant: Intel Corporation

Inventor： Raghu Nandan Chepuri ,  Fenardi Thenus ,  Peng Zou ,  Henry W. Koertzen

IPC: G06F1/32 ,  G06F1/26 ,  H02M1/36

CPC classification number: H02M1/36 ,  G06F1/26 ,  G06F1/3203 ,  G06F1/3209 ,  H02M3/158

Abstract: Described is a soft-start scheme for a voltage regulator. The apparatus comprises: a first voltage regulator to provide regulated voltage to an output node coupled to a load, the first voltage regulator operable to be in open loop via a bypass unit, the first voltage regulator including a comparator; and a second voltage regulator, coupled to the first voltage regulator, operable to be in closed loop, via the bypass unit, to provide a reference voltage for the comparator of the first voltage regulator.

Abstract translation: 描述了一种用于电压调节器的软启动方案。 该装置包括：第一电压调节器，用于向耦合到负载的输出节点提供调节电压，所述第一电压调节器可操作以经由旁路单元处于开环状态，所述第一电压调节器包括比较器; 以及耦合到所述第一电压调节器的第二电压调节器，其可操作以经由所述旁路单元处于闭环状态，以为所述第一电压调节器的所述比较器提供参考电压。

公开(公告)号：US20160315532A1

公开(公告)日：2016-10-27

申请号：US15152456

申请日：2016-05-11

Applicant: Intel Corporation

Inventor： Raghu Nandan Chepuri ,  Fenardi Thenus ,  Peng Zou ,  Henry W. Koertzen

IPC: H02M1/36 ,  H02M3/158

CPC classification number: H02M1/36 ,  G06F1/26 ,  G06F1/3203 ,  G06F1/3209 ,  H02M3/158

Abstract: Described is a soft-start scheme for a voltage regulator. The apparatus comprises: a first voltage regulator to provide regulated voltage to an output node coupled to a load, the first voltage regulator operable to be in open loop via a bypass unit, the first voltage regulator including a comparator; and a second voltage regulator, coupled to the first voltage regulator, operable to be in closed loop, via the bypass unit, to provide a reference voltage for the comparator of the first voltage regulator.

Abstract translation: 描述了一种用于电压调节器的软启动方案。 该装置包括：第一电压调节器，用于向耦合到负载的输出节点提供调节电压，所述第一电压调节器可操作以经由旁路单元处于开环状态，所述第一电压调节器包括比较器; 以及耦合到所述第一电压调节器的第二电压调节器，其可操作以经由所述旁路单元处于闭环状态，以为所述第一电压调节器的所述比较器提供参考电压。

公开(公告)号：US10963281B2

公开(公告)日：2021-03-30

申请号：US16148245

申请日：2018-10-01

Applicant: Intel Corporation

Inventor： Kai Wang ,  Bing Zhu ,  Peng Zou ,  Manohar Castelino

IPC: G06F9/455 ,  G06F9/50

Abstract: Memory security technologies are described. An example processing device includes a processor core and a memory controller coupled to the processor core and a memory. The processor core can determine that an exit condition to transfer control of a resource for a processor core from a first virtual machine monitor (VMM) to a second VMM has occurred. The processor core can also determine whether a control virtual machine control structure (VMCS) link pointer is valid. The processor core can also determine whether a reason value corresponding to the control VMCS link pointer is set. The processor core can also determine whether the reason value is set to zero. The processor core can also determining whether an exception bit corresponding to a specific exception type of a reason value is set. The processor core can also transfer a control of the resource from the first VMM to the second VMM.

公开(公告)号：US10698430B2

公开(公告)日：2020-06-30

申请号：US13720050

申请日：2012-12-19

Applicant: Intel Corporation

Inventor： Fenardi Thenus ,  Peng Zou ,  Joseph T. Dibene, II

IPC: G05F1/46 ,  H02M3/158

Abstract: In some embodiments described herein, proposed schemes utilize a duty-cycle sensing technique to detect load current imbalance in each individual inductor, and then adjusts the duty cycles for the specific phases through a digital duty cycle tuner.

公开(公告)号：US10146570B2

公开(公告)日：2018-12-04

申请号：US15118844

申请日：2015-09-25

Applicant: INTEL CORPORATION ,  Kai Wang ,  Bing Zhu ,  Peng Zou ,  Manohar Castelino

Inventor： Kai Wang ,  Bing Zhu ,  Peng Zou ,  Manohar Castelino

IPC: G06F9/455 ,  G06F9/50

Abstract: Memory security technologies are described. An example processing device includes a processor core and a memory controller coupled to the processor core and a memory. The processor core can determine that an exit condition to transfer control of a resource for a processor core from a first virtual machine monitor (VMM) to a second VMM has occurred. The processor core can also determine whether a control virtual machine control structure (VMCS) link pointer is valid. The processor core can also determine whether a reason value corresponding to the control VMCS link pointer is set. The processor core can also determine whether the reason value is set to zero. The processor core can also determining whether an exception bit corresponding to a specific exception type of a reason value is set. The processor core can also transfer a control of the resource from the first VMM to the second VMM.

公开(公告)号：US09223602B2

公开(公告)日：2015-12-29

申请号：US13730798

申请日：2012-12-28

Applicant: Intel Corporation

Inventor： Bing Zhu ,  Luhai Chen ,  Peng Zou ,  Kai Wang

IPC: G06F9/455 ,  G06F3/00 ,  G06F11/00 ,  G06F9/30

CPC classification number: G06F9/45558 ,  G06F9/3004 ,  G06F9/30076 ,  G06F9/45533 ,  G06F2009/45583

Abstract: A method of an aspect includes receiving an indication of an attempt by a virtual machine to modify a paging structure identification storage location to have a given value. It is determined that the given value matches at least one of a set of one or more blacklist values. The attempt by the virtual machine to modify the paging structure identification storage location to have the given value is trapped to a virtual machine monitor. Other methods, apparatus, and systems are also disclosed.

Abstract translation: 一种方面的方法包括：接收虚拟机尝试的指示，以修改寻呼结构标识存储位置以具有给定值。 确定给定值与一个或多个黑名单值的集合中的至少一个匹配。 虚拟机尝试将分页结构标识存储位置修改为具有给定值被捕获到虚拟机监视器。 还公开了其它方法，装置和系统。

公开(公告)号：US10884784B2

公开(公告)日：2021-01-05

申请号：US16648751

申请日：2017-12-27

Applicant: INTEL CORPORATION

Inventor： Kai Wang ,  Bing Zhu ,  Fangjian Zhong ,  Yadong Qi ,  Peng Zou

IPC: G06F9/48 ,  G06F9/30 ,  G06F9/455 ,  H04L12/40

Abstract: The systems and methods for enabling a lightweight VMM to efficiently interrupt virtual machines are provided. In some examples, the lightweight VMM is configured to utilize a self IPI to deliver external interrupts to the virtual machines. The self IPI may be generated by writing one or more values, including an identifier of the external interrupt, to an ICR of a programmable interrupt controller. The programmable interrupt controller may retrieve the one or more values from the ICR, identify the external interrupt and process the external interrupt, which culminates in the external interrupt being written to an IDT of a virtual machine targeted for interrupt delivery by the lightweight VMM.