- Patent Title: Memory devices having selectively electrically connected data lines
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Application No.: US16149261Application Date: 2018-10-02
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Publication No.: US10366759B2Publication Date: 2019-07-30
- Inventor: Toru Tanzawa
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dicke, Billig & Czaja, PLLC
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G11C11/00 ; G11C16/10 ; G11C16/26 ; G11C16/34 ; G11C16/08 ; G11C16/32
Abstract:
Memory devices include a first string of memory cells selectively connected to a first data line, a second string of memory cells selectively connected to a second data line, and a transistor that selectively connects the first data line to the second data line, thereby permitting connecting the first and second data lines in series before programming or sensing memory cells of the first and second strings of memory cells.
Public/Granted literature
- US20190035467A1 MEMORY DEVICES HAVING SELECTIVELY ELECTRICALLY CONNECTED DATA LINES Public/Granted day:2019-01-31
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