Invention Grant
- Patent Title: Method of manufacturing integrated fan-out package
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Application No.: US15981929Application Date: 2018-05-17
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Publication No.: US10366966B1Publication Date: 2019-07-30
- Inventor: Albert Wan , Ching-Hua Hsieh , Chung-Hao Tsai , Chuei-Tang Wang , Chao-Wen Shih , Han-Ping Pu , Chien-Ling Hwang , Pei-Hsuan Lee , Tzu-Chun Tang , Yu-Ting Chiu , Jui-Chang Kuo
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L21/56
- IPC: H01L21/56 ; H01L23/00 ; H01L23/538 ; H01L21/768 ; H01L21/48 ; H01L23/66 ; H01L25/00 ; H01L25/065 ; H01L23/31

Abstract:
A method of manufacturing an integrated fan-out (InFO) package includes at least the following steps. A package array is formed. A dielectric layer and a core material layer are sequentially formed on a first carrier. A portion of the core material layer is removed to form a core layer having a plurality of cavities. The first carrier, the dielectric layer, and the core layer are attached onto the package array such that the core layer is located between the dielectric layer and the package array. The first carrier is removed from the dielectric layer. A plurality of first conductive patches is formed on the dielectric layer above the cavities.
Information query
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