Invention Grant
- Patent Title: In-die transistor characterization in an IC
-
Application No.: US14505240Application Date: 2014-10-02
-
Publication No.: US10379155B2Publication Date: 2019-08-13
- Inventor: Ping-Chin Yeh , John K. Jennings , Rhesa Nathanael , Nui Chong , Cheang-Whang Chang , Daniel Y Chung
- Applicant: Xilinx, Inc
- Applicant Address: US CA San Jose
- Assignee: XILINX, INC.
- Current Assignee: XILINX, INC.
- Current Assignee Address: US CA San Jose
- Agent Robert M. Brush
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G01R31/3167

Abstract:
In an example implementation, an integrated circuit (IC) includes: a plurality of transistors disposed in a plurality of locations on a die of the IC; conductors coupled to terminals of each of the plurality of transistors; a digital-to-analog converter (DAC), coupled to the conductors, to drive voltage signals to the plurality of transistors in response to a digital input; and an analog-to-digital converter (ADC), coupled to at least a portion of the conductors, to generate samples in response to current signals induced in the plurality of transistors in response to the voltage signals, the samples being indicative of at least one electrostatic characteristic for the plurality of transistors.
Public/Granted literature
- US20160097805A1 IN-DIE TRANSISTOR CHARACTERIZATION IN AN IC Public/Granted day:2016-04-07
Information query