Invention Grant
- Patent Title: Processor core to coprocessor interface with FIFO semantics
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Application No.: US15256936Application Date: 2016-09-06
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Publication No.: US10380058B2Publication Date: 2019-08-13
- Inventor: David A. Brown , Daniel Fowler , Rishabh Jain , Erik Schlanger , Michael Duller
- Applicant: Oracle International Corporation
- Applicant Address: US CA Redwood Shores
- Assignee: Oracle International Corporation
- Current Assignee: Oracle International Corporation
- Current Assignee Address: US CA Redwood Shores
- Agency: Hickman Palermo Becker Bingham LLP
- Main IPC: G06F13/42
- IPC: G06F13/42 ; G06F1/3234 ; G06F1/32

Abstract:
Techniques are provided for exchanging dedicated hardware signals to manage a first-in first-out (FIFO). In an embodiment, a first processor initiates content transfer into the FIFO. The first processor activates a first hardware signal that is reserved for indicating that content resides within the FIFO. A second processor activates a second hardware signal that is reserved for indicating that content is accepted. The second hardware signal causes the first hardware signal to be deactivated. This exchange of hardware signals demarcates a FIFO transaction, which is mediated by interface circuitry of the FIFO.
Public/Granted literature
- US20180067889A1 Processor Core To Coprocessor Interface With FIFO Semantics Public/Granted day:2018-03-08
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