Invention Grant
- Patent Title: Package-on-package semiconductor assemblies and methods of manufacturing the same
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Application No.: US16027041Application Date: 2018-07-03
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Publication No.: US10381297B2Publication Date: 2019-08-13
- Inventor: Owen R. Fay , Jack E. Murray
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L21/48 ; H01L23/13 ; H01L25/10 ; H01L25/00 ; H01L23/00 ; H01L25/065 ; H01L25/18 ; H01L23/31

Abstract:
Package-on-package systems for packaging semiconductor devices. In one embodiment, a package-on-package system comprises a first semiconductor package device and a second semiconductor package device. The first package device includes a base substrate including a first side having a die-attach region and a peripheral region, a first semiconductor die attached to the base substrate at the die-attach region, wherein the first semiconductor die has a front side facing the first side of the base substrate and a backside spaced apart from the first side of the base substrate by a first distance, and a high density interconnect array in the perimeter region of the base substrate outside of the die-attach region. The interconnect array has a plurality of interconnects that extend from the first side of the base substrate by a second distance greater than the first distance. The second semiconductor device package is electrically coupled corresponding individual interconnects.
Public/Granted literature
- US20180315689A1 PACKAGE-ON-PACKAGE SEMICONDUCTOR ASSEMBLIES AND METHODS OF MANUFACTURING THE SAME Public/Granted day:2018-11-01
Information query
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