Invention Grant
- Patent Title: Add-on processing unit with I/O connectors
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Application No.: US15886409Application Date: 2018-02-01
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Publication No.: US10381761B2Publication Date: 2019-08-13
- Inventor: Maw-Zan Jau , Jen-Mao Chen , Chun Chang
- Applicant: QUANTA COMPUTER INC.
- Applicant Address: TW Taoyuan
- Assignee: QUANTA COMPUTER INC.
- Current Assignee: QUANTA COMPUTER INC.
- Current Assignee Address: TW Taoyuan
- Agency: Nixon Peabody LLP
- Agent Zhou Lu
- Main IPC: H05K7/02
- IPC: H05K7/02 ; H05K7/04 ; H01R12/72 ; H01R12/67 ; H01R12/70 ; G06F13/40 ; G06F1/18 ; G06F1/20 ; H05K7/14

Abstract:
A circuit card assembly includes a circuit card having front and back ends, substantially parallel longitudinal edges between the front and back ends, and a bus connector extending from one of the longitudinal edges. The circuit card assembly includes a bracket structure providing a mounting surface, the mounting surface comprising a bracket for engaging with a plurality of adjacent ones of a plurality of bracket slots with openings at a fixed pitch. The circuit card assembly includes a connector assembly at the surface of said circuit card at the first end, with at least a first input/output (I/O) connector, and a second I/O connector in a stacked arrangement with respect to the surface of said circuit card, where the first I/O connector and the second I/O connector extend through the bracket and are separated by the fixed pitch.
Public/Granted literature
- US20190027850A1 ADD-ON PROCESSING UNIT WITH I/O CONNECTORS Public/Granted day:2019-01-24
Information query