Invention Grant
- Patent Title: VDS comparator rise P, fall P, on late, off late outputs for ZVC timing
-
Application No.: US16128038Application Date: 2018-09-11
-
Publication No.: US10382028B2Publication Date: 2019-08-13
- Inventor: Jingwei Xu , Vijayalakshmi Devarajan , Gangqiang Zhang , Angelo William Pereira
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Lawrence J. Bassuk; Charles A. Brill; Frank D. Cimino
- Main IPC: H03K5/1536
- IPC: H03K5/1536 ; H03K5/15 ; H02J7/02 ; H02J50/10 ; H03K17/687 ; H02J7/10 ; H02M1/00

Abstract:
Methods and apparatus for detecting zero-volt crossing in a field-effect transistor. A comparator compares a drain-to source voltage of the transistor to a threshold voltage. A gate voltage signal of the transistor is provided to a clock input of the comparator such that said gate voltage signal is used to latch a result of said comparison to an output of the comparator. A control function with respect to the transistor is performed based on the value of the comparator output.
Public/Granted literature
- US20190013802A1 HIGH-RESOLUTION FET VDS ZERO-VOLT-CROSSING TIMING DETECTION SCHEME IN A WIRELESS POWER TRANSFER SYSTEM Public/Granted day:2019-01-10
Information query
IPC分类: