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公开(公告)号:US20210104515A1
公开(公告)日:2021-04-08
申请号:US17122682
申请日:2020-12-15
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Qingjie Ma , Wei Xu , Jingwei Xu , Yang Wang
IPC: H01L27/02 , H03K17/0812 , H03K17/081
Abstract: In a described example, an apparatus includes: a first metal oxide semiconductor field effect transistor (MOSFET) coupled between a first input terminal for receiving a supply voltage and an output terminal for coupling to a load, and having a first gate terminal; an enable terminal coupled to the first gate terminal for receiving an enable signal; a first current mirror coupled between the first input terminal and a first terminal of a first series resistor and having an input coupled to the first gate terminal; and a second MOSFET coupled between the first gate terminal and the output terminal, and having a second gate terminal coupled to the first terminal of the first series resistor, the first series resistor having a second terminal coupled to the output terminal.
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公开(公告)号:US20170070222A1
公开(公告)日:2017-03-09
申请号:US15347380
申请日:2016-11-09
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Ruochen Zhang , Xiaofan Qiu , Jingwei Xu , Qingjie Ma
IPC: H03K17/16
CPC classification number: H03K17/165 , H03K17/0822 , H03K17/284 , H03K19/017509 , H03K2217/0027
Abstract: A gate driver IC for driving an NMOS transistor having a drain coupled through a load to a power supply. A gate driver output drives the gate of the NMOS transistor. A comparator receives the drain voltage of the NMOS transistor and compares it to a reference voltage representative of a short circuit condition between the drain and the power supply. The comparator outputs a first value if the drain voltage is greater than the reference voltage and outputs a second value if the drain voltage is less than or equal to the reference voltage. Control circuitry receives the output of the first comparator and pulls the voltage of the gate driver output low if the comparator output is of the first value. Adaptive masking circuitry is operable, upon an application of an “on” signal to the gate driver output, to mask the output of the comparator such that a condition of the drain voltage being greater than the reference voltage does not cause the control circuitry to pull the voltage of the gate driver output low. The adaptive masking circuitry detects a Miller plateau in the gate voltage of the external NMOS transistor. The adaptive masking circuitry stops masking the output of the comparator after the end of the Miller plateau.
Abstract translation: 一种用于驱动具有通过负载耦合到电源的漏极的NMOS晶体管的栅极驱动器IC。 栅极驱动器输出驱动NMOS晶体管的栅极。 比较器接收NMOS晶体管的漏极电压,并将其与表示漏极和电源之间的短路状态的参考电压进行比较。 如果漏极电压大于参考电压,则比较器输出第一值,并且如果漏极电压小于等于参考电压则输出第二值。 如果比较器输出为第一值,则控制电路接收第一比较器的输出并将栅极驱动器的电压拉低。 自适应屏蔽电路在对栅极驱动器输出施加“导通”信号时可操作以掩蔽比较器的输出,使得漏极电压大于参考电压的条件不会导致控制电路拉 栅极驱动器的电压输出低电平。 自适应屏蔽电路检测外部NMOS晶体管的栅极电压的米勒平台。 自适应屏蔽电路在米勒平台结束后停止屏蔽比较器的输出。
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公开(公告)号:US11367719B2
公开(公告)日:2022-06-21
申请号:US17122682
申请日:2020-12-15
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Qingjie Ma , Wei Xu , Jingwei Xu , Yang Wang
IPC: H01L27/02 , H03K17/0812 , H03K17/081 , H03K17/08
Abstract: In a described example, an apparatus includes: a first metal oxide semiconductor field effect transistor (MOSFET) coupled between a first input terminal for receiving a supply voltage and an output terminal for coupling to a load, and having a first gate terminal; an enable terminal coupled to the first gate terminal for receiving an enable signal; a first current mirror coupled between the first input terminal and a first terminal of a first series resistor and having an input coupled to the first gate terminal; and a second MOSFET coupled between the first gate terminal and the output terminal, and having a second gate terminal coupled to the first terminal of the first series resistor, the first series resistor having a second terminal coupled to the output terminal.
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公开(公告)号:US10896905B2
公开(公告)日:2021-01-19
申请号:US16751491
申请日:2020-01-24
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Qingjie Ma , Wei Xu , Jingwei Xu , Yang Wang
IPC: H03K17/0812 , H01L27/02 , H03K17/081 , H03K17/08
Abstract: In a described example, an apparatus includes: a first metal oxide semiconductor field effect transistor (MOSFET) coupled between a first input terminal for receiving a supply voltage and an output terminal for coupling to a load, and having a first gate terminal; an enable terminal coupled to the first gate terminal for receiving an enable signal; a first current mirror coupled between the first input terminal and a first terminal of a first series resistor and having an input coupled to the first gate terminal; and a second MOSFET coupled between the first gate terminal and the output terminal, and having a second gate terminal coupled to the first terminal of the first series resistor, the first series resistor having a second terminal coupled to the output terminal.
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公开(公告)号:US20190386575A1
公开(公告)日:2019-12-19
申请号:US16554095
申请日:2019-08-28
Applicant: Texas Instruments Incorporated
Inventor: Mustapha El Markhi , Erhan Ozalevli , Tuli Dake , Dingkun Du , Gianpaolo Lisi , Jingwei Xu
IPC: H02M3/335
Abstract: A wireless power transfer system using a resonant rectifier circuit with capacitor sensing. A wireless power transfer system includes a power receiver resonant circuit and a synchronous rectifier. The power receiver resonant circuit includes an inductor and a capacitor connected in series with the inductor. The synchronous rectifier is configured to identify zero crossings of alternating current flowing through the inductor based on voltage across the capacitor, and control synchronous rectification of the alternating current based on timing of the zero crossings.
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公开(公告)号:US10483802B2
公开(公告)日:2019-11-19
申请号:US15458195
申请日:2017-03-14
Applicant: Texas Instruments Incorporated
Inventor: Jingwei Xu , Vijayalakshmi Devarajan , Lindsay Langford
Abstract: A wireless resonant power transmitter includes a first half-bridge and a second half-bridge adapted to be class D driven that are coupled to drive a series resonant circuit including a primary inductor (L) having a high side terminal and a low side terminal, and primary capacitor (C). A peak voltage sensor that includes a summing block is coupled across the high side terminal and the low side terminal of the primary L, and a peak-to-peak voltage detector is coupled to an output of the summing block to generate a DC voltage signal that is proportional to a peak-to-peak voltage across the primary C.
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公开(公告)号:US10439502B2
公开(公告)日:2019-10-08
申请号:US15279094
申请日:2016-09-28
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Mustapha El Markhi , Erhan Ozalevli , Tuli Dake , Dingkun Du , Gianpaolo Lisi , Jingwei Xu
Abstract: A wireless power transfer system using a resonant rectifier circuit with capacitor sensing. A wireless power transfer system includes a power receiver resonant circuit and a synchronous rectifier. The power receiver resonant circuit includes an inductor and a capacitor connected in series with the inductor. The synchronous rectifier is configured to identify zero crossings of alternating current flowing through the inductor based on voltage across the capacitor, and control synchronous rectification of the alternating current based on timing of the zero crossings.
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公开(公告)号:US20190109493A1
公开(公告)日:2019-04-11
申请号:US16214733
申请日:2018-12-10
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Kosha Mahmodieh , Gianpaolo Lisi , Ali Djabbari , Jingwei Xu , Vijayalakshmi Devarajan
Abstract: An example apparatus includes a feedback loop to: change a direction value when a second current value is greater than a first current value, the second current value being obtained after the first current value; and maintain the direction value when the second current value is less than the first current value. When the direction value corresponds to a first direction value, a summer increases a reference signal by a step size. When the direction value corresponds to a second direction value different than the first direction value, the summer decrease the reference signal by the step size.
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公开(公告)号:US20190052123A1
公开(公告)日:2019-02-14
申请号:US15674360
申请日:2017-08-10
Applicant: Texas Instruments Incorporated
Inventor: Marius Vicentiu Dina , Salman Mazhar , Jingwei Xu
Abstract: Systems and methods for wireless power transfer with fractional timing resolution are described. In some embodiments, an electrical power transmitter may include a transistor and a rising edge control circuit configured to control a gate of the transistor to produce a rising edge of a pulse at a time selected with a resolution greater than a full-clock period.
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公开(公告)号:US09520879B2
公开(公告)日:2016-12-13
申请号:US14742540
申请日:2015-06-17
Applicant: Texas Instruments Incorporated
Inventor: Ruochen Zhang , Xiaofan Qiu , Jingwei Xu , Qingjie Ma
IPC: H03B1/00 , H03K19/0175
CPC classification number: H03K17/165 , H03K17/0822 , H03K17/284 , H03K19/017509 , H03K2217/0027
Abstract: A gate driver IC for driving an NMOS transistor having a drain coupled through a load to a power supply. A gate driver output drives the gate of the NMOS transistor. A comparator receives the drain voltage of the NMOS transistor and compares it to a reference voltage representative of a short circuit condition between the drain and the power supply. The comparator outputs a first value if the drain voltage is greater than the reference voltage and outputs a second value if the drain voltage is less than or equal to the reference voltage. Control circuitry receives the output of the first comparator and pulls the voltage of the gate driver output low if the comparator output is of the first value. Adaptive masking circuitry is operable, upon an application of an “on” signal to the gate driver output, to mask the output of the comparator such that a condition of the drain voltage being greater than the reference voltage does not cause the control circuitry to pull the voltage of the gate driver output low. The adaptive masking circuitry detects a Miller plateau in the gate voltage of the external NMOS transistor. The adaptive masking circuitry stops masking the output of the comparator after the end of the Miller plateau.
Abstract translation: 一种用于驱动具有通过负载耦合到电源的漏极的NMOS晶体管的栅极驱动器IC。 栅极驱动器输出驱动NMOS晶体管的栅极。 比较器接收NMOS晶体管的漏极电压,并将其与表示漏极和电源之间的短路状态的参考电压进行比较。 如果漏极电压大于参考电压,则比较器输出第一值,并且如果漏极电压小于等于参考电压则输出第二值。 如果比较器输出为第一值,则控制电路接收第一比较器的输出并将栅极驱动器的电压拉低。 自适应屏蔽电路在对栅极驱动器输出施加“导通”信号时可操作以掩蔽比较器的输出,使得漏极电压大于参考电压的条件不会导致控制电路拉 栅极驱动器的电压输出低电平。 自适应屏蔽电路检测外部NMOS晶体管的栅极电压的米勒平台。 自适应屏蔽电路在米勒平台结束后停止屏蔽比较器的输出。
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