-
公开(公告)号:US10116294B1
公开(公告)日:2018-10-30
申请号:US15498385
申请日:2017-04-26
IPC分类号: H03B1/00 , H03K5/1536 , H03K5/15 , H03K17/687 , H02J7/02 , H02J50/10 , H02J7/10
CPC分类号: H03K5/1536 , H02J7/025 , H02J50/10 , H02J2007/105 , H03K5/1508 , H03K17/687
摘要: Methods and apparatus for detecting zero-volt crossing in a field-effect transistor. A comparator compares a drain-to source voltage of the transistor to a threshold voltage. A gate voltage signal of the transistor is provided to a clock input of the comparator such that said gate voltage signal is used to latch a result of said comparison to an output of the comparator. A control function with respect to the transistor is performed based on the value of the comparator output.
-
公开(公告)号:US20220206084A1
公开(公告)日:2022-06-30
申请号:US17133378
申请日:2020-12-23
摘要: An apparatus includes a resistor having a resistor terminal. The apparatus includes a capacitor coupled to the resistor terminal. The apparatus includes a transistor having a current terminal and a gate. The gate is coupled to the resistor terminal and coupled to the capacitor. The apparatus includes a comparator having a comparator input and a comparator output. The comparator input is coupled to the current terminal. The apparatus includes a latch having a latch input coupled to the comparator output.
-
公开(公告)号:US09739811B2
公开(公告)日:2017-08-22
申请号:US14699554
申请日:2015-04-29
发明人: Gangqiang Zhang
IPC分类号: G01R19/00 , G01R31/26 , G01R19/165
CPC分类号: G01R19/16571 , H03K2217/0027 , H03K2217/0063
摘要: An overcurrent detector that includes a sense transistor connected to a sense resistor, a second transistor matched to the sense transistor and connected in parallel to a second resistor, and a voltage comparator coupled to the sense transistor and second resistor. The sense transistor is configured to connect in a same gate and source connection with a driver output transistor. The second transistor and second resistor are configured to receive a current reference and generate a voltage reference. The voltage comparator is configured to compare the voltage reference with a voltage drop across the sense resistor.
-
公开(公告)号:US11614499B2
公开(公告)日:2023-03-28
申请号:US17133378
申请日:2020-12-23
摘要: An apparatus includes a resistor having a resistor terminal. The apparatus includes a capacitor coupled to the resistor terminal. The apparatus includes a transistor having a current terminal and a gate. The gate is coupled to the resistor terminal and coupled to the capacitor. The apparatus includes a comparator having a comparator input and a comparator output. The comparator input is coupled to the current terminal. The apparatus includes a latch having a latch input coupled to the comparator output.
-
公开(公告)号:US10382028B2
公开(公告)日:2019-08-13
申请号:US16128038
申请日:2018-09-11
IPC分类号: H03K5/1536 , H03K5/15 , H02J7/02 , H02J50/10 , H03K17/687 , H02J7/10 , H02M1/00
摘要: Methods and apparatus for detecting zero-volt crossing in a field-effect transistor. A comparator compares a drain-to source voltage of the transistor to a threshold voltage. A gate voltage signal of the transistor is provided to a clock input of the comparator such that said gate voltage signal is used to latch a result of said comparison to an output of the comparator. A control function with respect to the transistor is performed based on the value of the comparator output.
-
6.
公开(公告)号:US20180316339A1
公开(公告)日:2018-11-01
申请号:US15498385
申请日:2017-04-26
IPC分类号: H03K5/1536 , H03K5/15 , H03K17/687 , H02J7/02 , H02J50/10
CPC分类号: H03K5/1536 , H02J7/025 , H02J50/10 , H02J2007/105 , H03K5/1508 , H03K17/687
摘要: Methods and apparatus for detecting zero-volt crossing in a field-effect transistor. A comparator compares a drain-to source voltage of the transistor to a threshold voltage. A gate voltage signal of the transistor is provided to a clock input of the comparator such that said gate voltage signal is used to latch a result of said comparison to an output of the comparator. A control function with respect to the transistor is performed based on the value of the comparator output.
-
公开(公告)号:US20230006060A1
公开(公告)日:2023-01-05
申请号:US17682370
申请日:2022-02-28
摘要: An integrated circuit includes a first field effect transistor (FET) and a second FET formed in or over a semiconductor substrate and configured to selectively conduct a current between a first circuit node and a second circuit node. The first FET has a first source, a first drain and a first buried layer all having a first conductivity type, and a first gate between the first source and the first drain. The second FET has a second source, a second drain and a second buried layer all having the first conductivity type, and a second gate between the second source and the second drain. A first potential between the first source and the first buried layer is configurable independently from a second potential between the second source and the second buried layer.
-
公开(公告)号:US10014774B2
公开(公告)日:2018-07-03
申请号:US15296839
申请日:2016-10-18
发明人: Gangqiang Zhang , Vaibhav Garg , Xiaochun Zhao , Angelo W. D. Pereira , Vijayalakshmi Devarajan
CPC分类号: H02M3/158 , H02M1/08 , H02M2001/0009 , H02M2001/0032 , H02M2003/1566 , Y02B70/16
摘要: One example includes a switching power supply. The switching power supply includes a power stage, a feedback loop, and a simulated feedback error generator. The power stage provides an output signal in response to a switching signal. The feedback loop monitors the output signal and provides a feedback error signal to adjust the switching signal to regulate the output signal. The simulated feedback error generator temporarily provides a simulated feedback error signal during a transition period from the low power mode to a high power mode of the switching power supply until the feedback loop has enough time to provide the feedback error signal.
-
公开(公告)号:US09748842B1
公开(公告)日:2017-08-29
申请号:US15213217
申请日:2016-07-18
CPC分类号: H02M1/08 , H02M3/1588 , H02M2001/0009 , H03K17/08122 , H03K2217/0027 , Y02B70/1466
摘要: A system including a first power transistor including a gate, a second power transistor including a gate and connected in series with the first power transistor, wherein the connection between the transistors defines a switch node is disclosed. The system further includes a pulse width modulator (PWM) controller configured to assert control signals to the gates of the first and second power transistors, a high side sensing circuit coupled to the gate and a drain of the first power transistor. The system further includes a low side sensing circuit coupled to the gate and a drain of the second power transistor, and a track and hold circuit coupled to the high and low side sensing circuits and configured to couple sense signals from the high and low side sensing circuits.
-
-
-
-
-
-
-
-