Invention Grant
- Patent Title: Domain-differentiated power state coordination system
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Application No.: US16191691Application Date: 2018-11-15
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Publication No.: US10409347B2Publication Date: 2019-09-10
- Inventor: G. Glenn Henry , Darius D. Gaskins
- Applicant: VIA TECHNOLOGIES, INC.
- Applicant Address: TW New Taipei
- Assignee: VIA TECHNOLOGIES, INC.
- Current Assignee: VIA TECHNOLOGIES, INC.
- Current Assignee Address: TW New Taipei
- Agency: McClure, Qualey & Rodack, LLP
- Main IPC: G06F1/26
- IPC: G06F1/26 ; G06F1/3287 ; G06F1/24 ; G06F13/36 ; G06F15/163 ; G06F9/30 ; G06F9/50 ; G06F9/445 ; G06F15/82 ; G06F1/3234 ; G06F11/36 ; G06F11/14

Abstract:
A multi-core microprocessor is organized into a plurality of resource-associated domains including core domains, group domains, and a global domain. Each domain relates to either local resources, group resources, or global resources that are respectively used by a single core, a group of cores, or all the cores. Each core has its own independently settable target operating state selected from a plurality of possible target operating states that designate configurations for the local resources, group resources, and global resources. Each core is provided with coordination logic configured to implement or request implementation of the core's target operating state, but only to the extent that implementation of the target operating state would not reduce performance of any other core below its own target operating state.
Public/Granted literature
- US20190107873A1 Domain-Differentiated Power State Coordination System Public/Granted day:2019-04-11
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