Invention Grant
- Patent Title: Enhanced memory reliability in stacked memory devices
-
Application No.: US16128161Application Date: 2018-09-11
-
Publication No.: US10409677B2Publication Date: 2019-09-10
- Inventor: William C. Plants
- Applicant: Invensas Corporation
- Applicant Address: US CA San Jose
- Assignee: Invensas Corporation
- Current Assignee: Invensas Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: G11C7/00
- IPC: G11C7/00 ; G06F11/10 ; G11C29/52 ; G11C5/02 ; G11C29/42 ; G11C29/44 ; G11C29/00 ; H03M13/29 ; G11C5/04 ; G11C11/401
Abstract:
The invention pertains to semiconductor memories, and more particularly to enhancing the reliability of stacked memory devices. Apparatuses and methods are described for implementing RAID-style error correction to increase the reliability of the stacked memory devices.
Public/Granted literature
- US20190012232A1 ENHANCED MEMORY RELIABILITY IN STACKED MEMORY DEVICES Public/Granted day:2019-01-10
Information query
