- 专利标题: High mobility field effect transistors with a band-offset semiconductor source/drain spacer
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申请号: US15755490申请日: 2015-09-25
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公开(公告)号: US10411007B2公开(公告)日: 2019-09-10
- 发明人: Gilbert Dewey , Willy Rachmady , Matthew V. Metz , Chandra S. Mohapatra , Sean T. Ma , Jack T. Kavalieros , Anand S. Murthy , Tahir Ghani
- 申请人: Intel Corporation
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Green, Howard & Mughal LLP
- 国际申请: PCT/US2015/052342 WO 20150925
- 国际公布: WO2017/052618 WO 20170330
- 主分类号: H01L27/06
- IPC分类号: H01L27/06 ; H01L29/66 ; H01L21/8252 ; H01L29/775 ; H01L29/06 ; H01L29/205 ; H01L21/8258 ; H01L29/16 ; H01L29/423 ; H01L29/78 ; H01L29/786 ; B82Y10/00 ; H01L27/092 ; H01L21/8238
摘要:
Monolithic FETs including a channel region in a first semiconductor material disposed over a substrate. While a mask, such as a gate stack or sacrificial gate stack, is covering a channel region, a semiconductor spacer of a semiconductor material with a band offset relative to the channel material is grown, for example on at least a drain end of the channel region to introduce at least one charge carrier-blocking band offset between the channel semiconductor and a drain region of a third III-V semiconductor material. In some N-type transistor embodiments, the carrier-blocking band offset is a conduction band offset of at least 0.1 eV. A wider band gap and/or a blocking conduction band offset may contribute to reduced gate induced drain leakage (GIDL). Source/drain regions couple electrically to the channel region through the semiconductor spacer, which may be substantially undoped (i.e. intrinsic) or doped. In some embodiments, the semiconductor spacer growth is integrated into a gate-last, source/drain regrowth finFET fabrication process.
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