Invention Grant
- Patent Title: Memory structure
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Application No.: US15690298Application Date: 2017-08-30
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Publication No.: US10418440B2Publication Date: 2019-09-17
- Inventor: Chung-Hsien Liu , Chun-Hsu Chen , Lu-Ping Chiang
- Applicant: Winbond Electronics Corp.
- Applicant Address: TW Taichung
- Assignee: Winbond Electronics Corp.
- Current Assignee: Winbond Electronics Corp.
- Current Assignee Address: TW Taichung
- Agency: JCIPRNET
- Priority: CN201710256627 20170419
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L21/336 ; H01L29/06 ; H01L27/11517 ; H01L21/762 ; H01L21/28 ; H01L27/11521 ; H01L29/66 ; H01L27/115 ; H01L29/788

Abstract:
A memory structure including a substrate, stacked structures, at least one isolation structure, a second conductive layer, and a second dielectric layer is provided. The stacked structures are disposed on the substrate. Each of the stacked structures includes a first dielectric layer and a first conductive layer sequentially disposed on the substrate. A first opening is located between two adjacent stacked structures, and the first opening extends into the substrate. The isolation structure is disposed in the first opening and covers a sidewall of the first dielectric layer. The isolation structure has a recess, such that a top profile of the isolation structure is shaped as a funnel. The second conductive layer is disposed on the stacked structures and fills the first opening. The second dielectric layer is disposed between the second conductive layer and the first conductive layer.
Public/Granted literature
- US20180308929A1 MEMORY STRUCTURE AND MANUFACTURING METHOD THEREOF Public/Granted day:2018-10-25
Information query
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