Invention Grant
- Patent Title: Identifying asynchronous power loss
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Application No.: US16178963Application Date: 2018-11-02
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Publication No.: US10430262B2Publication Date: 2019-10-01
- Inventor: Michael G. Miller , Ashutosh Malshe , Violante Moschiano , Peter Feeley , Gary F. Besinga , Sampath K. Ratnam , Walter Di-Francesco , Renato C. Padilla, Jr. , Yun Li , Kishore Kumar Muchherla
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dicke, Billig & Czaja, PLLC
- Main IPC: G11C16/10
- IPC: G11C16/10 ; G06F11/07 ; G06F3/06 ; G06F11/10 ; G11C11/56 ; G11C16/22 ; G11C16/30 ; G11C16/34 ; G11C5/14

Abstract:
Apparatus having an array of memory cells include a controller configured to read a particular memory cell of a last written page of memory cells of a block of memory cells of the array of memory cells, determine whether a threshold voltage of the particular memory cell is less than a particular voltage level, and mark the last written page of memory cells as affected by power loss during a programming operation of the last written page of memory cells when the threshold voltage of the particular memory cell is determined to be higher than the particular voltage level.
Public/Granted literature
- US20190073251A1 IDENTIFYING ASYNCHRONOUS POWER LOSS Public/Granted day:2019-03-07
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