Invention Grant
- Patent Title: Seemingly monolithic interface between separate integrated circuit die
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Application No.: US15392209Application Date: 2016-12-28
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Publication No.: US10439639B2Publication Date: 2019-10-08
- Inventor: David W. Mendel , Jeffrey Erik Schulz , Keith Duwel , Huy Ngo , Jakob Raymond Jones
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Fletcher Yoder P.C.
- Main IPC: H03M9/00
- IPC: H03M9/00 ; G06F1/12 ; G06F13/42 ; H03K19/177

Abstract:
A seemingly monolithic interface between separate integrated circuit die may appear to be parallel or asynchronous from the perspective of the separate integrated circuit die. The signals of the seemingly monolithic interface, however, may actually be communicated between the separate die via serial and/or synchronous communication. In one method, a number of signals stored in a first parallel interface on a first integrated circuit die may be sampled. In some cases, at least one of the signals may be sampled more often than another one of the signals. A serial signal may be generated based on sampled signals. The serial signal may be transmitted to a corresponding second parallel interface on the second integrated circuit die.
Public/Granted literature
- US20180183463A1 SEEMINGLY MONOLITHIC INTERFACE BETWEEN SEPARATE INTEGRATED CIRCUIT DIE Public/Granted day:2018-06-28
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