Invention Grant
- Patent Title: Avoid thread switching in cache management
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Application No.: US15488929Application Date: 2017-04-17
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Publication No.: US10452586B2Publication Date: 2019-10-22
- Inventor: Abhishek R. Appu , Altug Koker , Joydeep Ray , Kiran C Veernapu , Balaji Vembu , Vasanth Ranganathan , Prasoonkumar Surti
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Jaffrey Watson Mendonsa & Hamilton LLP
- Main IPC: G06F13/40
- IPC: G06F13/40 ; G06F12/0846 ; G06F9/54 ; G06F13/42 ; G06T1/60 ; G06F12/0811 ; G06F12/084 ; G06F12/0831

Abstract:
Methods and apparatus relating to techniques for avoiding cache lookup for cold cache. In an example, an apparatus comprises logic, at least partially comprising hardware logic, to monitor a thread switching overhead parameter for an application executing in a processing system and in response to a determination that the thread switching overhead parameter exceeds a threshold, to activate a thread management algorithm to reduce thread switching in the processing system. Other embodiments are also disclosed and claimed.
Public/Granted literature
- US20180300130A1 AVOID THREAD SWITCHING IN CACHE MANAGEMENT Public/Granted day:2018-10-18
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