Invention Grant
- Patent Title: Fin field effect transistors having liners between device isolation layers and active areas of the device
-
Application No.: US16028918Application Date: 2018-07-06
-
Publication No.: US10461189B2Publication Date: 2019-10-29
- Inventor: Sug-Hyun Sung , Jung-gun You , Gi-gwan Park , Ki-il Kim
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Yeongtong-gu, Suwon-si, Gyeonggi-do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Yeongtong-gu, Suwon-si, Gyeonggi-do
- Agency: Muir Patent Law, PLLC
- Priority: KR10-2015-0123660 20150901
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/06 ; H01L29/66 ; H01L27/092 ; H01L21/8238 ; H01L21/762

Abstract:
An integrated circuit device includes a fin-type active area protruding from a substrate; a plurality of liners sequentially covering lower side walls of the fin-type active area; a device isolation layer covering the lower side walls of the fin-type active area with the plurality of liners between the device isolation layer and the fin-type active area; and a gate insulating layer extending to cover a channel region of the fin-type active area, the plurality of liners, and the device isolation layer, and including protrusions located on portions of the gate insulating layer which cover the plurality of liners.
Public/Granted literature
Information query
IPC分类: