Invention Grant
- Patent Title: FinFET device with different liners for PFET and NFET and method of fabricating thereof
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Application No.: US15725544Application Date: 2017-10-05
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Publication No.: US10522417B2Publication Date: 2019-12-31
- Inventor: Ming-Lung Cheng , Yen-Chun Lin , Da-Wen Lin
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L27/092 ; H01L29/78 ; H01L21/02 ; H01L21/311
Abstract:
A semiconductor device includes a P-type Field Effect Transistor (PFET) and an NFET. The PFET includes an N-well disposed in a substrate, a first fin structure disposed over the N-well, a first liner layer disposed over the N-well, and a second liner layer disposed over the first liner layer. The first liner layer and the second liner layer include different materials. The NFET includes a P-well disposed in the substrate, a second fin structure disposed over the P-well, a third liner layer disposed over the P-well. The third liner layer and the second liner layer include the same materials.
Public/Granted literature
- US20180315664A1 FINFET DEVICE WITH DIFFERENT LINERS FOR PFET AND NFET AND METHOD OF FABRICATING THEREOF Public/Granted day:2018-11-01
Information query
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