An example integrated circuit die includes: a plurality of lower level conductor layers, a plurality of lower level insulator layers between the plurality of lower level conductor layers, a plurality of lower level vias extending vertically through the lower level insulator layers, a plurality of upper level conductor layers overlying the lower level conductor layers, a plurality of upper level insulator layers between and surrounding the upper level conductor layers, a plurality of upper level vias; at least two scribe seals arranged to form a vertical barrier extending vertically from the semiconductor substrate to a passivation layer at an upper surface of the integrated circuit die; and at least one opening extending vertically through one of the at least two scribe seals and extending through: the upper level conductor layers, the upper level via layers, the lower level conductor layers, and the lower level via layers.