Invention Grant
- Patent Title: Memory cell with oxide cap and spacer layer for protecting a floating gate from a source implant
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Application No.: US16110330Application Date: 2018-08-23
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Publication No.: US10546947B2Publication Date: 2020-01-28
- Inventor: Mel Hymas , Bomy Chen , Greg Stom , James Walls
- Applicant: Microchip Technology Incorporated
- Applicant Address: US AZ Chandler
- Assignee: MICROCHIP TECHNOLOGY INCORPORATED
- Current Assignee: MICROCHIP TECHNOLOGY INCORPORATED
- Current Assignee Address: US AZ Chandler
- Agency: Slayden Grubert Beard PLLC
- Main IPC: H01L21/265
- IPC: H01L21/265 ; H01L21/28 ; H01L21/3105 ; H01L21/3213 ; H01L29/423 ; H01L29/66 ; H01L29/788

Abstract:
A method of forming a memory cell, e.g., flash memory cell, may include (a) depositing polysilicon over a substrate, (b) depositing a mask over the polysilicon, (c) etching an opening in the mask to expose a surface of the polysilicon, (d) growing a floating gate oxide at the exposed polysilicon surface, (e) depositing additional oxide above the floating gate oxide, such that the floating gate oxide and additional oxide collectively define an oxide cap, (f) removing mask material adjacent the oxide cap, (g) etching away portions of the polysilicon uncovered by the oxide cap, wherein a remaining portion of the polysilicon defines a floating gate, and (h) depositing a spacer layer over the oxide cap and floating gate. The spacer layer may includes a shielding region aligned over at least one upwardly-pointing tip region of the floating gate, which helps protect such tip region(s) from a subsequent source implant process.
Public/Granted literature
- US20190097027A1 Memory Cell With Oxide Cap And Spacer Layer For Protecting A Floating Gate From A Source Implant Public/Granted day:2019-03-28
Information query
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