Invention Grant
- Patent Title: Voltage regulator efficiency-aware system energy management
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Application No.: US15471606Application Date: 2017-03-28
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Publication No.: US10551900B2Publication Date: 2020-02-04
- Inventor: Vijayakumar A. Dibbad , Satish Prathaban , Harinarayanan Seshadri , Rajeev D. Muralidhar
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Patent Capital Group
- Main IPC: G06F1/324
- IPC: G06F1/324 ; G06F1/3228 ; G06F1/329

Abstract:
A first optimal CPU frequency that produces minimal power consumption for a CPU/platform combination may be calculated by using an Efficiency Aware Race to Halt (EARtH) algorithm, which ignores the power efficiency curve of the voltage regulator (VR). These results may then be modified by applying the power efficiency curve of the associated VR to determine a second optimal CPU frequency that produces power consumption that is less than the value calculated by the EARtH algorithm.
Public/Granted literature
- US20180284863A1 VOLTAGE REGULATOR EFFICIENCY-AWARE SYSTEM ENERGY MANAGEMENT Public/Granted day:2018-10-04
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