- 专利标题： Circuit and layout for resistive random-access memory arrays having two bit lines per column
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申请号： US16155083申请日： 2018-10-09
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公开(公告)号： US10553643B2公开(公告)日： 2020-02-04
- 发明人: John L McCollum
- 申请人： Microsemi SoC Corp.
- 申请人地址： US CA San Jose
- 专利权人： Microsemi SoC Corp.
- 当前专利权人： Microsemi SoC Corp.
- 当前专利权人地址： US CA San Jose
- 代理机构： Glass and Associates
- 代理商 Kenneth D'Alessandro; Kenneth Glass
- 主分类号： H01L27/24
- IPC分类号： H01L27/24 ; G11C13/00 ; H01L45/00 ; H01L29/08 ; H01L29/78
摘要：
A layout is presented for a ReRAM memory cell array including rows and columns of ReRAM cells, each ReRAM cell is in a row and column of ReRAM cells. Each ReRAM cell includes a ReRAM device. A first transistor is coupled between the ReRAM device and a first bit line associated with the column containing the ReRAM cell. The first transistor has a gate coupled to a first word line associated with the row containing the ReRAM cell. A second transistor is coupled between the ReRAM device and a second bit line associated with the column containing the ReRAM cell. The second transistor has a gate coupled to a second word line associated with the row containing the ReRAM cell.
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