Invention Grant
- Patent Title: Dynamic memory scrambling
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Application No.: US15355785Application Date: 2016-11-18
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Publication No.: US10558585B2Publication Date: 2020-02-11
- Inventor: Yannick Marc Nevers , Bastien Jean Claude Aghetti , Nicolaas Klarinus Johannes Van Winkelhoff , Stephane Zonza
- Applicant: ARM Limited
- Applicant Address: GB Cambridge
- Assignee: ARM Limited
- Current Assignee: ARM Limited
- Current Assignee Address: GB Cambridge
- Agency: Pramudji Law Group PLLC
- Agent Ari Pramudji
- Priority: GB1520512.3 20151120
- Main IPC: G06F12/14
- IPC: G06F12/14 ; G06F21/79 ; G06F12/1009 ; G06F21/55

Abstract:
A memory, a data processing system comprising a memory, a method of operating a memory and a memory compiler apparatus and method of memory compilation are provided, which relate to a memory comprising data storage circuitry to store data values at data locations. Addressing circuitry is provided to access the data value at a storage location in dependence on a received address and readout circuitry to provide an output value in dependence on the accessed data value. The memory further comprises scrambling circuitry to select at least one of: a mapping between the address and the storage location; and a mapping between the data value and the output value, in dependence on a received scrambling value. The mapping between the address and the storage location and/or the data value and the output value can thus be easily and rapidly changed.
Public/Granted literature
- US20170147509A1 Dynamic Memory Scrambling Public/Granted day:2017-05-25
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