Invention Grant
- Patent Title: Trench capacitor with warpage reduction
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Application No.: US16028862Application Date: 2018-07-06
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Publication No.: US10559650B2Publication Date: 2020-02-11
- Inventor: Jiao Jia , Zhipeng Feng , He Lin , Yunlong Liu , Manoj Jain
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Andrew R. Ralston; Charles A. Brill; Frank D. Cimino
- Main IPC: H01L49/02
- IPC: H01L49/02 ; H01L21/306 ; H01L21/768 ; H01L21/02 ; H01L21/3215 ; H01L21/3213 ; H01L23/495 ; H01L23/00 ; H01L21/3205 ; H01L25/18 ; H01L29/78

Abstract:
A trench capacitor includes a plurality of trenches in a doped semiconductor surface layer of a substrate. At least one dielectric layer lines a surface of the plurality of trenches. A second polysilicon layer that is doped is on a first polysilicon layer that is on the dielectric layer which fills the plurality of trenches. The second polysilicon layer has a higher doping level as compared to the first polysilicon layer.
Public/Granted literature
- US20190229181A1 TRENCH CAPACITOR WITH WARPAGE REDUCTION Public/Granted day:2019-07-25
Information query
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