- 专利标题: Method for synchronizing an active load modulation clock within a transponder, and corresponding transponder
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申请号: US16029457申请日: 2018-07-06
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公开(公告)号: US10560255B2公开(公告)日: 2020-02-11
- 发明人: Maksimiljan Stiglic , Nejc Suhadolnik , Marc Houdebine
- 申请人: STMICROELECTRONICS SA , STMicroelectronics Razvoj Polprevodnikov d.o.o.
- 申请人地址: FR Montrouge SI Ljubljana
- 专利权人: STMICROELECTRONICS SA,STMICROELECTRONICS RAZVOJ POLPREVODNIKOV D.O.O.
- 当前专利权人: STMICROELECTRONICS SA,STMICROELECTRONICS RAZVOJ POLPREVODNIKOV D.O.O.
- 当前专利权人地址: FR Montrouge SI Ljubljana
- 代理机构: Seed IP Law Group LLP
- 优先权: EP17305918 20170712
- 主分类号: H03D3/24
- IPC分类号: H03D3/24 ; H04L7/033 ; G06K19/07 ; H03C3/09 ; H03L7/099 ; H04B5/00
摘要:
A transponder communicates with a reader using active load modulation. The transponder includes a digital phase locked loop (DPLL), which, in operation, generates an active load modulation (ALM) carrier clock synchronized to carrier clock of the reader. Between transmission of data frames, the DPLL is placed in a lock mode of operation in which a feedback loop of the DPLL is closed. Within a transmitted data frame having a duration, the DPLL is placed, for the duration of the transmitted data frame, in a hold mode of operation in which the feedback loop is opened. A phase of the ALM carrier clock is adjusted at least once during the duration of the transmitted data frame.
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