- Patent Title: Microelectronic package structures including redistribution layers
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Application No.: US15910360Application Date: 2018-03-02
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Publication No.: US10566229B2Publication Date: 2020-02-18
- Inventor: Shing-Yih Shih , Hsu Chiang , Neng-Tai Shih
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: H01L21/683
- IPC: H01L21/683 ; H01L21/48 ; H01L23/538 ; H01L23/00 ; H01L23/498 ; H01L25/065 ; H01L25/18 ; H01L25/00 ; H01L21/78
Abstract:
A package structure and a method for fabricating thereof are provided. The package structure includes a substrate, a first connector, a redistribution layer, a second connector, and a chip. The first connector is disposed over the substrate. The redistribution layer is directly disposed over the first connector, and is connected to the substrate by the first connector. The redistribution layer includes a block layer, and a metal layer over the block layer. The second connector is directly disposed over the redistribution layer, and the chip is connected to the redistribution layer by the second connector.
Public/Granted literature
- US20180190531A1 SEMICONDUCTOR PACKAGE STRUCTURES INCLUDING REDISTRIBUTION LAYERS Public/Granted day:2018-07-05
Information query
IPC分类:
