A data reading error is reduced. A memory cell array in a storage device includes a write word line, a read word line, a write bit line, a read bit line, a source line, and a gain cell. For example, a read transistor in the gain cell can include a metal oxide in a channel formation region. A cancel circuit is electrically connected to the read bit line. The cancel circuit has a function of supplying, to the read bit line, current for canceling leakage current supplied to the read bit line from the gain cell in a non-selected state. In read operation, a potential change of the read bit line due to leakage current is compensated for by the current from the cancel circuit, so that a data reading error is reduced.