The subject matter disclosed herein relates to super-junction (SJ) power devices and, more specifically, to edge termination techniques for SJ power devices. A semiconductor super-junction (SJ) device includes one or more epitaxial (epi) layers having a termination region disposed adjacent to an active region. The termination region includes a plurality of vertical pillars of a first and a second conductivity-type, wherein, moving outward from the active region, a respective width of each successive vertical pillar is the same or smaller. The termination region also includes a plurality of compensated regions having a low doping concentration disposed directly between a first side of each vertical pillar of the first conductivity-type and a first side of each vertical pillar of the second conductivity-type, wherein, moving outward from the active region, a respective width of each successive compensated region is the same or greater.