Invention Grant
- Patent Title: Piezoelectric package-integrated delay lines
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Application No.: US15088830Application Date: 2016-04-01
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Publication No.: US10594294B2Publication Date: 2020-03-17
- Inventor: Adel A. Elsherbini , Feras Eid , Baris Bicen , Telesphor Kamgaing , Vijay K. Nair , Georgios C. Dogiamis , Johanna M. Swan , Valluri R. Rao
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt P.C.
- Main IPC: H03H9/13
- IPC: H03H9/13 ; H03H9/36

Abstract:
Embodiments of the invention include a waveguide structure that includes a first piezoelectric transducer that is positioned in proximity to a first end of a cavity of an organic substrate. The first piezoelectric transducer receives an input electrical signal and generates an acoustic wave to be transmitted with a transmission medium. A second piezoelectric transducer is positioned in proximity to a second end of the cavity. The second piezoelectric transducer receives the acoustic wave from the transmission medium and generates an output electrical signal.
Public/Granted literature
- US20170288639A1 PIEZOELECTRIC PACKAGE-INTEGRATED DELAY LINES Public/Granted day:2017-10-05
Information query
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