公开(公告)号：US11016288B2

公开(公告)日：2021-05-25

申请号：US16072161

申请日：2016-04-01

Applicant: Intel Corporation

Inventor： Sasha N. Oster ,  Feras Eid ,  Johanna M. Swan ,  Thomas L. Sounart ,  Aleksandar Aleksov ,  Shawna M. Liff ,  Baris Bicen ,  Valluri R. Rao

IPC: G02B26/08 ,  H01L27/20 ,  H01L41/09 ,  H01L41/253

Abstract: Embodiments of the invention include a display formed on an organic substrate and methods of forming such a device. According to an embodiment, an array of pixel mirrors may be formed on the organic substrate. For example, each of the pixel mirrors is actuatable about one or more axes out of the plane of the organic substrate. Additionally, embodiments of the invention may include an array of routing mirrors formed on the organic substrate. According to an embodiment, each of the routing mirrors is actuatable about two axes out of the plane of the organic substrate. In embodiments of the invention, a light source may be used for emitting light towards the array of routing mirrors. For example, light emitted from the light source may be reflected to one or more of the pixel mirrors by one of the routing mirrors.

公开(公告)号：US10649158B2

公开(公告)日：2020-05-12

申请号：US16098406

申请日：2016-07-01

Applicant: Intel Corporation

Inventor： Johanna M. Swan ,  Aleksandar Aleksov ,  Sasha N. Oster ,  Feras Eid ,  Baris Bicen ,  Thomas L. Sounart ,  Shawna M. Liff ,  Valluri R. Rao

IPC: G02B6/42 ,  G02B6/36

Abstract: Embodiments of the invention include an optoelectronic package that allows for in situ alignment of optical fibers. In an embodiment, the optoelectronic package may include an organic substrate. Embodiments include a cavity formed into the organic substrate. Additionally, the optoelectronic package may include an actuator formed on the organic substrate that extends over the cavity. In one embodiment, the actuator may include a first electrode, a piezoelectric layer formed on the first electrode, and a second electrode formed on the piezoelectric layer. According to an additional embodiment of the invention, the actuator may include a first portion and a second portion. In order to allow for resistive heating and actuation driven by thermal expansion, a cross-sectional area of the first portion of the beam may be greater than a cross-sectional area of the second portion of the beam.

公开(公告)号：US10600787B2

公开(公告)日：2020-03-24

申请号：US16078675

申请日：2016-03-28

Applicant: Intel Corporation

Inventor： Sansaptak Dasgupta ,  Han Wui Then ,  Marko Radosavljevic ,  Peter G. Tolchinsky ,  Roza Kotlyar ,  Valluri R. Rao

IPC: H01L27/092 ,  H01L29/66 ,  H01L29/06 ,  H01L29/20 ,  H01L29/778 ,  H01L21/02 ,  H01L21/28 ,  H01L21/8258 ,  H01L23/498 ,  H01L23/544 ,  H01L29/16 ,  H01L29/205 ,  H01L29/423 ,  H01L29/04 ,  H01L29/417 ,  H01L21/8238 ,  H04B1/38

Abstract: This disclosure pertains to a gallium nitride transistor that is formed in a trench etched into a silicon substrate. A gallium nitride layer is on the trench of the silicon substrate. A source electrode and a drain electrode reside on the gallium nitride layer. A gate electrode resides on the gallium nitride layer between the source electrode and the drain electrode. A first polarization layer resides on the gallium nitride layer between the source electrode and the gate electrode, and a second polarization layer resides on the gallium nitride layer between the gate electrode and the drain electrode. The silicon substrate can include a silicon 111 substrate.

公开(公告)号：US10032052B2

公开(公告)日：2018-07-24

申请号：US15586820

申请日：2017-05-04

Applicant: Intel Corporation

Inventor： Adel A. Elsherbini ,  Telesphor Kamgaing ,  Feras Eid ,  Vijay K. Nair ,  Georgios C. Dogiamis ,  Johanna M. Swan ,  Valluri R. Rao

IPC: G06K19/06 ,  G06K7/10 ,  H03H9/30 ,  G06K19/067

Abstract: Embodiments of the invention include delay line circuitry that is integrated with an organic substrate. Organic dielectric material and a plurality of conductive layers form the organic substrate. The delay line circuitry includes a piezoelectric transducer to receive a guided electromagnetic wave signal and to generate an acoustic wave signal to be transmitted with an acoustic transmission medium. An acoustic reflector is communicatively coupled to the acoustic transmission medium. The acoustic reflector receives a plurality of acoustic wave signals from the acoustic transmission medium and reflects acoustic wave signals to the piezoelectric transducer using the acoustic transmission medium. The transducer converts the reflected acoustic signals into electromagnetic waves which are then transmitted back through the antenna and decoded by the reader.

公开(公告)号：US11854894B2

公开(公告)日：2023-12-26

申请号：US17112697

申请日：2020-12-04

Applicant: Intel Corporation

Inventor： Valluri R. Rao ,  Patrick Morrow ,  Rishabh Mehandru ,  Doug Ingerly ,  Kimin Jun ,  Kevin O'Brien ,  Paul Fischer ,  Szuya S. Liao ,  Bruce Block

IPC: H01L21/822 ,  H01L21/306 ,  H01L21/683 ,  H01L21/8238 ,  H01L21/66 ,  H01L23/528 ,  H01L23/532 ,  H01L23/00 ,  H01L27/092 ,  H01L27/12 ,  H01L29/04 ,  H01L29/06 ,  H01L29/08 ,  H01L29/16 ,  H01L29/20 ,  H01L29/66 ,  G01R1/073 ,  H01L25/065

CPC classification number: H01L21/8221 ,  H01L21/30625 ,  H01L21/6835 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823871 ,  H01L21/823878 ,  H01L22/14 ,  H01L23/528 ,  H01L23/53233 ,  H01L24/03 ,  H01L24/05 ,  H01L27/0924 ,  H01L27/1207 ,  H01L29/04 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/16 ,  H01L29/20 ,  G01R1/07307 ,  H01L24/08 ,  H01L25/0657 ,  H01L27/1214 ,  H01L27/1222 ,  H01L29/66545 ,  H01L2221/68345 ,  H01L2221/68363 ,  H01L2221/68381 ,  H01L2224/08147 ,  H01L2225/06565

Abstract: Integrated circuit cell architectures including both front-side and back-side structures. One or more of back-side implant, semiconductor deposition, dielectric deposition, metallization, film patterning, and wafer-level layer transfer is integrated with front-side processing. Such double-side processing may entail revealing a back side of structures fabricated from the front-side of a substrate. Host-donor substrate assemblies may be built-up to support and protect front-side structures during back-side processing. Front-side devices, such as FETs, may be modified and/or interconnected during back-side processing. Electrical test may be performed from front and back sides of a workpiece. Back-side devices, such as FETs, may be integrated with front-side devices to expand device functionality, improve performance, or increase device density.

公开(公告)号：US11222863B2

公开(公告)日：2022-01-11

申请号：US16080989

申请日：2016-04-01

Applicant: Intel Corporation

Inventor： Fay Hua ,  Christopher M. Pelto ,  Valluri R. Rao ,  Mark T. Bohr ,  Johanna M. Swan

IPC: H01L23/00 ,  H01L21/02 ,  H01L21/768 ,  H01L21/78 ,  H01L25/065 ,  H01L25/00

Abstract: Embodiments of the present disclosure describe techniques for fabricating a stacked integrated circuit (IC) device. A first wafer that includes a plurality of first IC dies may be sorted to identify first known good dies of the plurality of first IC dies. The first wafer may be diced to singulate the first IC dies. A second wafer that includes a plurality of second IC dies may be sorted to identify second know good dies of the plurality of second IC dies. The first known good dies may be bonded to respective second known good dies of the second wafer. In some embodiments, the first known good dies may be thinned after bonding the first know good dies to the second wafer. Other embodiments may be described and/or claimed.

公开(公告)号：US10969576B2

公开(公告)日：2021-04-06

申请号：US16072164

申请日：2016-04-01

Applicant: Intel Corporation

Inventor： Aleksandar Aleksov ,  Feras Eid ,  Sasha N. Oster ,  Shawna M. Liff ,  Johanna M. Swan ,  Thomas L. Sounart ,  Baris Bicen ,  Valluri R. Rao

IPC: G02B26/10 ,  G02B26/08 ,  G02B1/14

Abstract: Disclosed herein are maskless imaging tools and display systems that include piezoelectrically actuated mirrors and methods of forming such devices. The maskless imaging tool may include a light source. Additionally, the tool may include one or more piezoelectrically actuated mirrors for receiving light from the light source. The piezoelectrically actuated mirrors are actuatable about one or more axes to reflect the light from the light source to a workpiece positioned to receive light from the piezoelectrically actuated mirror. Disclosed herein is a maskless imaging tool that is a laser direct imaging lithography (LDIL) tool. The maskless imaging tool may also be a via-drill tool. Disclosed herein is also a piezoelectrically actuated mirror used in a projection system. For example, the projection system may be integrated into a pair of glasses.

公开(公告)号：US10943836B2

公开(公告)日：2021-03-09

申请号：US16884099

申请日：2020-05-27

Applicant: Intel Corporation

Inventor： Marko Radosavljevic ,  Sansaptak Dasgupta ,  Valluri R. Rao ,  Han Wui Then

IPC: H01L21/8258 ,  H01L29/778 ,  H01L29/78 ,  H01L27/092 ,  H01L29/06 ,  H01L29/66 ,  H01L29/04 ,  H01L27/12 ,  H01L21/762 ,  H01L27/06 ,  H01L29/20 ,  H01L29/423 ,  H01L29/417

Abstract: A complementary metal oxide semiconductor (CMOS) device that includes a gallium nitride n-type MOS and a silicon P-type MOS is disclosed. The device includes silicon 111 substrate, a gallium nitride transistor formed in a trench in the silicon 111 substrate, the gallium nitride transistor comprising a source electrode, a gate electrode, and a drain electrode. The device further includes a silicon/polysilicon layer formed over the gallium nitride transistor.

公开(公告)号：US10816733B2

公开(公告)日：2020-10-27

申请号：US16072240

申请日：2016-04-01

Applicant: Intel Corporation

Inventor： Sasha N. Oster ,  Johanna M. Swan ,  Feras Eid ,  Thomas L. Sounart ,  Aleksandar Aleksov ,  Shawna M. Liff ,  Baris Bicen ,  Valluri R. Rao

IPC: G02B6/35 ,  H04Q11/00 ,  G02B26/08 ,  H04B10/25

Abstract: Embodiments of the invention include an optical routing device that includes an organic substrate. According to an embodiment, an array of cavities are formed into the organic substrate and an array of piezoelectrically actuated mirrors may be anchored to the organic substrate with each piezoelectrically actuated mirror extending over a cavity. In order to properly rout incoming optical signals, the optical routing device may also include a routing die mounted on the organic substrate. The routing die may be electrically coupled to each of the piezoelectrically actuated mirrors and is able to generated a voltage across the first and second electrodes of each piezoelectrically actuated mirror. Additionally, a photodetector may be electrically coupled to the routing die. According to an embodiment, an array of fiber optic cables may be optically coupled with one of the piezoelectrically actuated mirrors and optically coupled with the photodetector.

公开(公告)号：US10763248B2

公开(公告)日：2020-09-01

申请号：US15754822

申请日：2015-09-24

Applicant: Intel Corporation

Inventor： Sansaptak W. Dasgupta ,  Marko Radosavljevic ,  Han Wui Then ,  Ravi Pillarisetty ,  Kimin Jun ,  Patrick Morrow ,  Valluri R. Rao ,  Paul B. Fischer ,  Robert S. Chau

IPC: H01L31/0312 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/20 ,  H01L21/36 ,  H01L25/18 ,  H01L23/00 ,  H01L21/768 ,  H01L21/78 ,  H01L25/00 ,  H01L25/065

Abstract: The electrical and electrochemical properties of various semiconductors may limit the usefulness of various semiconductor materials for one or more purposes. A completed gallium nitride (GaN) semiconductor layer containing a number of GaN power management integrated circuit (PMIC) dies may be bonded to a completed silicon semiconductor layer containing a number of complementary metal oxide (CMOS) control circuit dies. The completed GaN layer and the completed silicon layer may be full size (e.g., 300 mm). A layer transfer operation may be used to bond the completed GaN layer to the completed silicon layer. The layer transfer operation may be performed on full size wafers. After slicing the full size wafers a large number of multi-layer dies, each having a GaN die layer transferred to a silicon die may be produced.