Invention Grant
- Patent Title: Integrated structures and methods of forming vertically-stacked memory cells
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Application No.: US16528454Application Date: 2019-07-31
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Publication No.: US10600807B2Publication Date: 2020-03-24
- Inventor: Jie Sun , Fatma Arzum Simsek-Ege
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L21/768 ; H01L27/11582 ; H01L21/28 ; H01L27/115 ; H01L23/532 ; H01L23/522 ; H01L23/528 ; H01L27/11524 ; H01L27/11556 ; H01L27/1157

Abstract:
Some embodiments include an integrated structure having a stack of alternating dielectric levels and conductive levels, vertically-stacked memory cells within the conductive levels, an insulative material over the stack and a select gate material over the insulative material. An opening extends through the select gate material, through the insulative material, and through the stack of alternating dielectric and conductive levels. A first region of the opening within the insulative material is wider along a cross-section than a second region of the opening within the select gate material, and is wider along the cross-section than a third region of the opening within the stack of alternating dielectric levels and conductive levels. Channel material is within the opening and adjacent the insulative material, the select gate material and the memory cells. Some embodiments include methods of forming vertically-stacked memory cells.
Public/Granted literature
- US20190355745A1 Integrated Structures and Methods of Forming Vertically-Stacked Memory Cells Public/Granted day:2019-11-21
Information query
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