Invention Grant
- Patent Title: Error correction potency improvement via added burst beats in a dram access cycle
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Application No.: US15849396Application Date: 2017-12-20
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Publication No.: US10606692B2Publication Date: 2020-03-31
- Inventor: Paul W. Coteus , Kyu-hyoun Kim , Luis A. Lastras-Montano , Warren E. Maule , Patrick J. Meaney , James A. O'Connor , Barry M. Trager
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Hoffman & Baron, LLP
- Agent Daniel P. Morris, Esq.
- Main IPC: G06F11/10
- IPC: G06F11/10 ; G11C29/52 ; G11C7/10 ; G11C29/04

Abstract:
An embodiment includes a method for use in operating a memory chip, the method comprising: operating the memory chip with an increased burst length relative to a standard burst length of the memory chip; and using the increased burst length to access metadata during a given operation of the memory chip. Another embodiment includes a memory module, comprising a plurality of memory chips, each memory chip being operable with an increased burst length relative to a standard burst length of the memory chip, the increased burst length being used to access metadata during a given operation of the memory module.
Public/Granted literature
- US20190188074A1 ERROR CORRECTION POTENCY IMPROVEMENT VIA ADDED BURST BEATS IN A DRAM ACCESS CYCLE Public/Granted day:2019-06-20
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