Invention Grant
- Patent Title: Memory device including a deterioration level detection circuit
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Application No.: US16047384Application Date: 2018-07-27
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Publication No.: US10607705B2Publication Date: 2020-03-31
- Inventor: Han Jun Lee , Seung Bum Kim , Il Han Park
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-Do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si, Gyeonggi-Do
- Agency: F. Chau & Associates, LLC
- Priority: KR10-2018-0003475 20180110
- Main IPC: G11C16/34
- IPC: G11C16/34 ; G11C16/26 ; G11C16/30 ; G11C11/56 ; G11C29/50 ; G11C29/42 ; G11C29/00 ; G06F11/07 ; G11C16/04

Abstract:
A memory device includes a voltage generator that provides a read voltage to a selected word line and provides a pass voltage to a plurality of unselected word lines, and a deterioration level detection circuit. The selected word line and the unselected word lines are connected to a plurality of memory cells. The deterioration level detection circuit detects a deterioration level of memory cells connected to the selected word line based on data of memory cells that receive the read voltage. The memory cells connected to the selected word line and the memory cells that receive the read voltage are included in the plurality of memory cells. The voltage generator changes the pass voltage provided to the unselected word lines based on the deterioration level.
Public/Granted literature
- US20190214091A1 MEMORY DEVICE Public/Granted day:2019-07-11
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