Invention Grant
- Patent Title: FinFET transistor gate and epitaxy formation
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Application No.: US15846445Application Date: 2017-12-19
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Publication No.: US10608121B2Publication Date: 2020-03-31
- Inventor: Ruqiang Bao , Zhenxing Bi , Kangguo Cheng , Zheng Xu
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Vazken Alexanian
- Main IPC: H01L29/788
- IPC: H01L29/788 ; H01L29/78 ; H01L29/06 ; H01L29/49 ; H01L29/66 ; H01L29/417 ; H01L21/28

Abstract:
Embodiments are directed to a method of forming a semiconductor device and resulting structures that reduce shallow trench isolation (STI) undercutting, floating gates, and gate voids without degrading epitaxy quality. The method includes forming a first and second semiconductor fin on a substrate. A buffer layer is formed on a surface of the substrate between the first and second semiconductor fins and a semiconducting layer is formed on the buffer layer. The buffer layer is selectively removed and replaced with a dielectric layer. A first gate is formed over a first channel region of the first semiconductor fin and a second gate is formed over a second channel region of the first semiconductor fin. Source and drain epitaxy regions are selectively formed on surfaces of the first gate.
Public/Granted literature
- US20180114863A1 FINFET TRANSISTOR GATE AND EPITAXY FORMATION Public/Granted day:2018-04-26
Information query
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