Invention Grant
- Patent Title: FinFET structure and fabricating method of gate structure
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Application No.: US16412337Application Date: 2019-05-14
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Publication No.: US10651174B2Publication Date: 2020-05-12
- Inventor: Yi-Liang Ye , Kuang-Hsiu Chen , Chun-Wei Yu , Chueh-Yang Liu , Yu-Ren Wang
- Applicant: UNITED MICROELECTRONICS CORP.
- Applicant Address: TW Hsin-Chu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Hsin-Chu
- Agent Winston Hsu
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L21/8234 ; H01L29/51

Abstract:
A method of forming a gate structure on a fin structure includes the steps of providing a fin structure covered by a first silicon oxide layer, a silicon nitride layer, a gate material and a cap material in sequence, wherein the silicon nitride layer contacts the first silicon oxide layer. Later, the cap material is patterned to form a first cap layer and the gate material is patterned to form a first gate electrode by taking the silicon nitride layer as an etching stop layer. Then, the silicon nitride layer not covered by the first gate electrode is removed to expose part of the first silicon oxide layer. Finally, a first dielectric layer is formed to conformally cover the first silicon oxide layer, the first gate electrode and the first cap layer.
Public/Granted literature
- US20190279979A1 FINFET STRUCTURE AND FABRICATING METHOD OF GATE STRUCTURE Public/Granted day:2019-09-12
Information query
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