Invention Grant
- Patent Title: Semiconductor package and manufacturing method thereof
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Application No.: US15993615Application Date: 2018-05-31
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Publication No.: US10658263B2Publication Date: 2020-05-19
- Inventor: Chi-Yang Yu , Chin-Liang Chen , Kuan-Lin Ho , Yu-Min Liang , Wen-Lin Chen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L23/34
- IPC: H01L23/34 ; H01L23/373 ; H01L23/00 ; H01L23/31 ; H01L23/495

Abstract:
A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a first semiconductor die, a second semiconductor die, a molding compound, a heat dissipation module and an adhesive material. The first and second semiconductor dies are different types of dies and are disposed side by side. The molding compound encloses the first and second semiconductor dies. The heat dissipation module is located directly on and in contact with the back sides of the first and second semiconductor dies. The adhesive material is filled and contacted between the heat dissipation module and the molding compound. The semiconductor package has a central region and a peripheral region surrounding the central region. The first and second semiconductor dies are located within the central region. A sidewall of the heat dissipation module, a sidewall of the adhesive material and a sidewall of the molding compound are substantially coplanar.
Information query
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