Invention Grant
- Patent Title: 3D semiconductor device with isolation layers
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Application No.: US16536606Application Date: 2019-08-09
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Publication No.: US10665695B2Publication Date: 2020-05-26
- Inventor: Zvi Or-Bach , Deepak C. Sekar , Brian Cronquist
- Applicant: Monolithic 3D Inc.
- Applicant Address: US CA San Jose
- Assignee: MONOLITHIC 3D INC.
- Current Assignee: MONOLITHIC 3D INC.
- Current Assignee Address: US CA San Jose
- Agency: Tran & Associates
- Main IPC: H01L29/00
- IPC: H01L29/00 ; H01L29/12 ; H01L29/76 ; H01L29/94 ; H01L31/00 ; H01L31/062 ; H01L31/113 ; H01L31/119 ; H01L29/66 ; H01L23/48 ; H01L23/34 ; H01L23/50 ; H01L27/088 ; H01L27/06 ; H01L27/02 ; H01L29/78 ; H01L27/108 ; H01L27/11526 ; H01L27/11551 ; H01L27/11573 ; H01L23/544 ; H01L21/74 ; H01L29/10 ; H01L29/808 ; H01L29/732 ; H01L27/118 ; H01L27/11578 ; H01L27/24

Abstract:
A 3D semiconductor device, the device including: a first level including single crystal first transistors, where the first level is overlaid by a first isolation layer; a second level including single crystal second transistors, where the first isolation layer is overlaid by the second level, and where the second level is overlaid by a second isolation layer; a third level including single crystal third transistors, where the second isolation layer is overlaid by the third level, where the third level is overlaid by a third isolation layer, and where the first isolation layer and the second isolation layer are separated by a distance of less than four microns.
Public/Granted literature
- US20190363179A1 3D SEMICONDUCTOR DEVICE WITH ISOLATION LAYERS Public/Granted day:2019-11-28
Information query
IPC分类: