Invention Grant
- Patent Title: SiC substrate evaluation method and method for manufacturing SiC epitaxial wafer
-
Application No.: US16598486Application Date: 2019-10-10
-
Publication No.: US10697898B2Publication Date: 2020-06-30
- Inventor: Yoshitaka Nishihara , Koji Kamei
- Applicant: SHOWA DENKO K.K.
- Applicant Address: JP Tokyo
- Assignee: SHOWA DENKO K.K.
- Current Assignee: SHOWA DENKO K.K.
- Current Assignee Address: JP Tokyo
- Agency: Sughrue Mion, PLLC
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@78ee0450
- Main IPC: G01N21/88
- IPC: G01N21/88 ; H01L29/16

Abstract:
In a SiC substrate evaluation method, a bar-shaped stacking fault is observed by irradiating a surface of a SiC substrate before stacking an epitaxial layer with excitation light and extracting light having a wavelength range from equal to or greater than 405 nm and equal to or less than 445 nm among photoluminescence light beams emitted from the first surface.
Public/Granted literature
- US20200116649A1 SiC SUBSTRATE EVALUATION METHOD AND METHOD FOR MANUFACTURING SiC EPITAXIAL WAFER Public/Granted day:2020-04-16
Information query