Invention Grant
- Patent Title: Transistor, semiconductor memory device, and method of manufacturing transistor
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Application No.: US16122834Application Date: 2018-09-05
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Publication No.: US10714629B2Publication Date: 2020-07-14
- Inventor: Nobuyoshi Saito , Tomomasa Ueda , Kentaro Miura , Keiji Ikeda , Tsutomu Tezuka
- Applicant: TOSHIBA MEMORY CORPORATION
- Applicant Address: JP Tokyo
- Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Foley & Lardner LLP
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@c21ee17
- Main IPC: H01L29/786
- IPC: H01L29/786 ; H01L27/108 ; H01L29/66 ; H01L21/02

Abstract:
According to one embodiment, a transistor includes first to third conductors, first and second oxide semiconductors, and a gate insulating film. The first and second conductors are stacked via an insulator above a substrate. The first oxide semiconductor is formed on the first conductor. The second oxide semiconductor is formed on the first oxide semiconductor. The second oxide semiconductor have a pillar shape through the second conductor along a first direction crossing a surface of the substrate. The second oxide semiconductor is different from the first oxide semiconductor. The gate insulating film is formed between the second conductor and the second oxide semiconductor. The third conductor is formed on the second oxide semiconductor.
Public/Granted literature
- US20190237581A1 TRANSISTOR, SEMICONDUCTOR MEMORY DEVICE, AND METHOD OF MANUFACTURING TRANSISTOR Public/Granted day:2019-08-01
Information query
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