Invention Grant
- Patent Title: Maintaining processor resources during architectural events
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Application No.: US16401889Application Date: 2019-05-02
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Publication No.: US10740249B2Publication Date: 2020-08-11
- Inventor: Jason W. Brandt , Sanjoy K. Mondal , Richard A. Uhlig , Gilbert Neiger , Robert T. George
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Nicholson De Vos Webster & Elliott LLP
- Main IPC: G06F13/00
- IPC: G06F13/00 ; G06F12/1036 ; G06F9/48 ; G06F12/1027 ; G06F9/455 ; G06F12/02 ; G06F12/1045 ; G06F12/12 ; G06F12/0804 ; G06F12/0891 ; G06F12/109 ; G06F12/123
Abstract:
In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.
Public/Granted literature
- US20190324920A1 MAINTAINING PROCESSOR RESOURCES DURING ARCHITECTURAL EVENTS Public/Granted day:2019-10-24
Information query
