- 专利标题： Large area contacts for small transistors
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申请号： US15273778申请日： 2016-09-23
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公开(公告)号： US10749031B2公开(公告)日： 2020-08-18
- 发明人: Xiuyu Cai , Qing Liu , Ruilong Xie , Chun-Chen Yeh
- 申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , GLOBALFOUNDRIES, Inc. , STMICROELECTRONICS, INC.
- 申请人地址： US NY Armonk US TX Coppell KY
- 专利权人： INTERNATIONAL BUSINESS MACHINES CORPORATION,STMICROELECTRONICS, INC.,GLOBALFOUNDRIES, INC
- 当前专利权人： INTERNATIONAL BUSINESS MACHINES CORPORATION,STMICROELECTRONICS, INC.,GLOBALFOUNDRIES, INC
- 当前专利权人地址： US NY Armonk US TX Coppell KY
- 代理机构： Cantor Colburn LLP
- 代理商 Steven Meyers
- 主分类号： H01L29/78
- IPC分类号： H01L29/78 ; H01L29/417 ; H01L29/66 ; H01L29/08 ; H01L29/45 ; H01L21/02 ; H01L21/8234 ; H01L21/768 ; H01L21/285
摘要：
A large area electrical contact for use in integrated circuits features a non-planar, sloped bottom profile. The sloped bottom profile provides a larger electrical contact area, thus reducing the contact resistance, while maintaining a small contact footprint. The sloped bottom profile can be formed by recessing an underlying layer, wherein the bottom profile can be crafted to have a V-shape, U-shape, crescent shape, or other profile shape that includes at least a substantially sloped portion in the vertical direction. In one embodiment, the underlying layer is an epitaxial fin of a FinFET. A method of fabricating the low-resistance electrical contact employs a thin etch stop liner for use as a hard mask. The etch stop liner, e.g., HfO2, prevents erosion of an adjacent gate structure during the formation of the contact.
公开/授权文献
- US20170012130A1 LARGE AREA CONTACTS FOR SMALL TRANSISTORS 公开/授权日：2017-01-12
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