Invention Grant
- Patent Title: Bus-device-function address space mapping
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Application No.: US15572436Application Date: 2015-12-20
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Publication No.: US10754808B2Publication Date: 2020-08-25
- Inventor: Prashant Sethi , Michael T. Klinglesmith , David J. Harriman , Reuven Rozic , Shanthanand Kutuva Rabindrananth
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Alliance IP, LLC
- International Application: PCT/US2015/066956 WO 20151220
- International Announcement: WO2016/178717 WO 20161110
- Main IPC: G06F13/40
- IPC: G06F13/40 ; G06F13/42 ; G06F12/1081 ; G06F12/1009 ; G06F12/1027

Abstract:
Bridge logic is provided to receive a request from a device, where the request references an address of a secondary address space. The secondary address space corresponds to a subset of addresses in a configuration address space of a system, and the secondary address space corresponds to a first view of the configuration address space. The bridge logic uses a mapping table to translate the address into a corresponding address in the configuration address space, where addresses of the configuration address space correspond to a different second view of the configuration address space.
Public/Granted literature
- US20180137074A1 BUS-DEVICE-FUNCTION ADDRESS SPACE MAPPING Public/Granted day:2018-05-17
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